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  tsm 4n90 900v n-channel power mosfet 1/10 version: b13 to - 220 ito - 220 product summary v ds (v) r ds(on) ( ? ) i d (a) 900 4 @ v gs =10v 4 general description the tsm4n90 n-channel enhancement mode power mosfet is produced by planar stripe dmos technology. this advanced technology has been especially tailor ed to minimize on-state resistance, provide superio r switching performance, and withstand high energy pu lse in the avalanche and commutation mode. these devices are well suited for high efficiency switch mode power supply, electronic lamp ballast based on half bridge. features low r ds(on) 4 ? (max.) low gate charge typical @ 25nc (typ.) improve dv/dt capability block diagram n-channel mosfet ordering information part no. package packing tsm4n90cz c0 to-220 50pcs / tube tsm4n90ci c0g ito-220 50pcs / tube note: g denote for halogen free product absolute maximum rating (ta = 25 o c unless otherwise noted) parameter symbol to-220 ito-220 unit drain-source voltage v ds 900 v gate-source voltage v gs 30 v continuous drain current tc = 25 o c i d 4 4 * a tc = 100 o c 2.2 2.2 * pulsed drain current * i dm 16 16 * a peak diode recovery dv/dt (note 3) dv/dt 4.5 v single pulse avalanche energy (note 2) e as 474 mj avalanche current (repetitive) (note 1) i ar 4 a repetitive avalanche energy (note 1) e ar 12.3 mj power dissipation tc = 25 o c p d 123 38.7 w derate above 25 0.98 0.3 oc/w operating junction temperature t j 150 oc storage temperature range t stg -55 to +150 o c * limited by maximum junction temperature pin definition: 1. gate 2. drain 3. source
tsm 4n90 900v n-channel power mosfet 2/10 version: b13 thermal performance parameter symbol to-220 ito-220 unit thermal resistance - junction to case r ? jc 1.01 3.23 o c/w thermal resistance - junction to ambient r ? ja 62.5 notes: surface mounted on fr4 board t 10sec electrical specifications (tc = 25 o c unless otherwise noted) parameter conditions symbol min typ max unit static drain-source breakdown voltage v gs = 0v, i d = 250ua bv dss 900 -- -- v drain-source on-state resistance v gs = 10v, i d = 2.0a r ds(on) -- 3.2 4.0 ? gate threshold voltage v ds = v gs , i d = 250ua v gs(th) 2.0 -- 4.0 v zero gate voltage drain current v ds = 900v, v gs = 0v i dss -- -- 10 ua gate body leakage v gs = 30v, v ds = 0v i gss -- -- 100 na forward transconductance v ds = 30v, i d = 2.0a g fs -- 6 -- s diode forward voltage i s = 4a, v gs = 0v v sd -- -- 1.5 v dynamic b total gate charge v ds = 720v, i d = 4a, v gs = 10v q g -- 25 -- nc gate-source charge q gs -- 4.8 -- gate-drain charge q gd -- 10.2 -- input capacitance v ds = 25v, v gs = 0v, f = 1.0mhz c iss -- 955 -- pf output capacitance c oss -- 80 -- reverse transfer capacitance c rss -- 13 -- switching c turn-on delay time v gs = 10v, i d = 4a, v dd = 450v, r g = 25 ? t d(on) -- 49 -- ns turn-on rise time t r -- 38 -- turn-off delay time t d(off) -- 146 -- turn-off fall time t f -- 50 -- reverse recovery time v gs = 0v, i s = 4a, di f /dt = 100a/us t fr -- 487 -- ns reverse recovery charge q fr -- 2.8 -- uc notes: 1. repetitive rating: pulse width limited by maximu m junction temperature 2. max rating e as test condition: v dd = 50v, i as =4a, l=56mh, r g =25 ? , starting t j =25 guaranteed 100% e as test condition: v dd = 50v, i as =4a, l=1mh, r g =25 ? , starting t j =25 3. i sd 4a, di/dt 200a/us, v dd bv, starting t j =25 4. pulse test: pulse width 300us, duty cycle 2% 5. b for design reference only, not subject to prod uction testing. 6. c switching time is essentially independent of o perating temperature.
tsm 4n90 900v n-channel power mosfet 3/10 version: b13 electrical characteristics curve (tc = 25 o c, unless otherwise noted) output characteristics transfer characteristics on-resistance vs. drain current gate charge on-resistance vs. junction temperature source-drain diode forward voltage
tsm 4n90 900v n-channel power mosfet 4/10 version: b13 electrical characteristics curve (ta = 25 o c, unless otherwise noted) drain current vs. case temperature bv dss vs. junction temperature maximum safe operating area capacitance vs. drain-source voltage maximum safe operating area (ito-220)
tsm 4n90 900v n-channel power mosfet 5/10 version: b13 electrical characteristics curve (ta = 25 o c, unless otherwise noted) normalized thermal transient impedance, junction-to -ambient normalized thermal transient impedance, junction-to -ambient (ito-220)
tsm 4n90 900v n-channel power mosfet 6/10 version: b13 gate charge test circuit & waveform resistive switching test circuit & waveform e as test circuit & waveform
tsm 4n90 900v n-channel power mosfet 7/10 version: b13 diode reverse recovery time test circuit & waveform
tsm 4n90 900v n-channel power mosfet 8/10 version: b13 to-220 mechanical drawing unit: millimeters marking diagram y = year code m = month code for halogen free product ( o =jan, p =feb, q =mar, r =apl, s =may, t =jun, u =jul, v =aug, w =sep, x =oct, y =nov, z =dec) l = lot code
tsm 4n90 900v n-channel power mosfet 9/10 version: b13 ito-220 mechanical drawing unit: millimeters marking diagram y = year code g = halogen free ww = week code by calendar year f = factory code
tsm 4n90 900v n-channel power mosfet 10/10 version: b13 notice specifications of the products displayed herein are subject to change without notice. tsc or anyone on its behalf, assumes no responsibility or liability for any erro rs or inaccuracies. information contained herein is intended to provide a product description only. no license, express or implied, to any intellectual property rights is granted by this document. except as provided in tscs terms and co nditions of sale for such products, tsc assumes no liability wh atsoever, and disclaims any express or implied warr anty, relating to sale and/or use of tsc products includi ng liability or warranties relating to fitness for a particular purpose, merchantability, or infringement of any patent, cop yright, or other intellectual property right. the products shown herein are not designed for use in medical, life-saving, or life-sustaining applica tions. customers using or selling these products for use i n such applications do so at their own risk and agr ee to fully indemnify tsc for any damages resulting from such i mproper use or sale.


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